ml_switcheroo.compiler.backends.rdna.synthesizer
================================================

.. py:module:: ml_switcheroo.compiler.backends.rdna.synthesizer

.. autoapi-nested-parse::

   RDNA Synthesizer and Registry Backend.

   This module provides the "Middle-End" logic for the RDNA compiler pipeline.
   It bridges the gap between high-level Abstract Logic (LogicalGraphs)
   and low-level Physical Assembly (Instruction nodes/Registers).

   It contains:
   1.  **RegisterAllocator**: A dual-pool allocator managing Scalar (SGPR) and
       Vector (VGPR) register files independently.
   2.  **RdnaSynthesizer**:
       -   **Target Transformation (`from_graph`)**: Converts topological logical graphs
           into a linear list of RDNA instructions.
       -   **Source Transformation (`to_python`)**: Converts RDNA AST nodes back into
           Python LibCST nodes for high-level analysis or documentation.
   3.  **RdnaBackend**: The CompilerBackend adapter for the Registry, including header generation.



Attributes
----------

.. autoapisummary::

   ml_switcheroo.compiler.backends.rdna.synthesizer.MAX_VGPR
   ml_switcheroo.compiler.backends.rdna.synthesizer.MAX_SGPR


Classes
-------

.. autoapisummary::

   ml_switcheroo.compiler.backends.rdna.synthesizer.RegisterAllocator
   ml_switcheroo.compiler.backends.rdna.synthesizer.RdnaSynthesizer
   ml_switcheroo.compiler.backends.rdna.synthesizer.RdnaBackend


Module Contents
---------------

.. py:data:: MAX_VGPR
   :value: 256


.. py:data:: MAX_SGPR
   :value: 106


.. py:class:: RegisterAllocator

   Manages the mapping between symbolic variable names and physical registers.
   Maintains separate accounting for Scalar (SGPR) and Vector (VGPR) files.


   .. py:method:: get_vector_register(var_name: str) -> ml_switcheroo.compiler.frontends.rdna.nodes.VGPR

      Retrieves or allocates a Vector register (VGPR) for a symbolic variable.



   .. py:method:: get_scalar_register(var_name: str) -> ml_switcheroo.compiler.frontends.rdna.nodes.SGPR

      Retrieves or allocates a Scalar register (SGPR) for a symbolic variable.



   .. py:method:: allocate_vector_temp() -> ml_switcheroo.compiler.frontends.rdna.nodes.VGPR

      Allocates an anonymous temporary VGPR.



   .. py:method:: allocate_scalar_temp() -> ml_switcheroo.compiler.frontends.rdna.nodes.SGPR

      Allocates an anonymous temporary SGPR.



   .. py:method:: reset() -> None

      Resets all allocation state.



.. py:class:: RdnaSynthesizer(semantics: ml_switcheroo.semantics.manager.SemanticsManager)

   Bidirectional transpiler component for RDNA ISA.


   .. py:attribute:: semantics


   .. py:attribute:: allocator


   .. py:attribute:: macro_registry
      :type:  Dict[str, Callable]


   .. py:method:: from_graph(graph: ml_switcheroo.compiler.ir.LogicalGraph) -> List[ml_switcheroo.compiler.frontends.rdna.nodes.RdnaNode]

      Converts a LogicalGraph into a list of RDNA AST nodes.



   .. py:method:: to_python(rdna_nodes: List[ml_switcheroo.compiler.frontends.rdna.nodes.RdnaNode]) -> libcst.Module

      Converts RDNA AST nodes into a Python source structure representation.



.. py:class:: RdnaBackend(semantics: Optional[ml_switcheroo.semantics.manager.SemanticsManager] = None)

   Bases: :py:obj:`ml_switcheroo.compiler.backend.CompilerBackend`


   Compiler Backend implementation for AMD RDNA.
   Orchestrates the synthesis (Graph -> AST) and emission (AST -> Text).


   .. py:attribute:: synthesizer


   .. py:attribute:: emitter


   .. py:attribute:: target_arch
      :value: 'gfx1030'



   .. py:method:: compile(graph: ml_switcheroo.compiler.ir.LogicalGraph) -> str

      Compiles LogicalGraph to RDNA Assembly string.

      :param graph: The intermediate representation.

      :returns: The RDNA code.
      :rtype: str